Introduction to Programmable Computing Devices

Document 1432-001

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Seven Worlds Library Access: | Main Node | 1400 Series Index |
ID     : 1432-001
TITLE  : An Introduction to Current Programmable Computing Devices
AUTHOR : Seven Swords Special Service
AUTHOR2: Division of Documents & Records
C DATE : 254/2330
CLASS  : Secret ALPHA
INFORMATION IN THIS DOCUMENT IS CURRENT AND SENSITIVE.


Introduction

Programmable computing devices are the current paradigm in automation and computing. These devices are notable in that they operate by reprogramming their internal hardware system for each task. As a result, any problem that can be reduced to logic gates (i.e. anything compilable with a logic compiler) can be run at gate speed in the hardware. Contrast this with the previous paradigm that reigned from the mid-20th century to the mid-22nd: a single hard-wired chip with various instructions to perform an operation. Although simpler to program (and to some extent design), these hard-wired chips suffer from the problem that a problem must be reduced to a linear sequence of arithmetic operations. Moreover, each operation can take several instruction clock cycles! The result is a system with far lower effeciency and hence speed.

Modern programmable computing devices are essentially all variants of the Field Programmable Gate Array (FPGA), developed in the late-21st century. Along with Shield drive and fusion reactor technologies, FPGAs form the basis of the Starcaste's control over high-technology.

Brief History

Programmable computing devices began with the creation of the programmable logic device in the late 20th century. However, the early designs had few gates and were slow to program, making them suitable only for certain limited applications. The development of the electronic Field Programmable Gate Array (FPGA) began the real developments that led to the modern FPGA.

The first electronic FPGAs had only a few thousand gates, limiting them from being used for general computing. Initially, use was confined to rapid prototyping, genetic algorithms, and analogic/digital interface circuits. It wasn't until the early 21st century that the first logic compilers were developed, allowing a FPGA to be programmed as a replacement for a hard-wired arithmetic chip. These first compilers were crude and ineffecient, although an electronic FPGA could equal common electronic arithmetic chips.

Development of the fully photonic circuit in 2010 almost killed the FPGA; a general-arithmetic photonic chip was faster than any FPGA could hope, especially given the relative crudenss of the logic compiler optimizations. It wasn't until 2090 that photonic FPGA chips were developed. Even so, FPGA circuits were still considered fringe technology, until the development of the Jump drive made far-flung colonies possible. These colonies needed robust, easy to repair equipment that could still perform reasonably well. FPGA circuits vastly simplified logistical support, as a single chip type could be used in multiple circuits. With the limited industrial capacity of a colony, and the difficulty of inter-stellar shipping, the financial rewards of developing practical FPGA circuits were large. During this time, most of the major modern FPGA manufacturers were founded (e.g. Photonix).

With sufficient demand for FPGA-based systems, logic compilers were rapidly developed. By 2210, there were multiple manufacturers of what is essentially a modern FPGA, and the associated logic compilers. Dedicated chips began to be relegated to niche markets, such as military hardware. This trend has continued to the modern day, with much of the general computing done on FPGA-based systems, with only occasional dedicated chips in very specialized applications (such as communication encryption).

Field Programmable Gate Arrays

FPGAs are a generic chip with a large number of generic gates. These gates can be programmed into any basic logic gate, and interconnected in almost any fashion. Moreover, this programming can be done on-the-fly, in a fraction of a second. The result is a chip that can replace virtually any dedicated circuit.

Modern FPGAs are based on photonic circuitry, which reduces the power consumption and heat generation compared to electronic systems. They are not capable of switching electric current however. This is rarely a problem in computation tasks, but does negate the possibility of using FPGAs (or any photonic chip) in power-regulation and control.

FPGAs are available from 17 different Subcons and Starcorps, with varying sizes and numbers of gates, interconnects, and I/O pins. Each manufacturer has a proprietary programming method, which is jealously guarded in an attempt to control a portion of the market. Most of the major logic compilers can program any FPGA, but compilers by a hardware manufacturer are notorious for deliberately mis-programming competitors chips. The most popular manufacturer is Photonix, which is technically a Subcon (lacking Jump drive production facilities). They control 48% of the overall market, and produce the most varied line of chips. Their programming method is the closest thing to a standard, and is freely published; as a result, every logic compiler can program a Photonix chip of any sort.

FPGAs are rated by the number of gates, interconnects, and I/O pins. To help engineers, there is a standard nomenclature for rating an FPGA type, although there are aspects to a chip which are not covered by the nomenclature. The rating is a rather long number, which is encoded as:

XXXXXXXXX-YYYY-ZZZZ

  1. XXXXXXXXX is the number of gates, zero-padded on the left if necessary. The standard does note that for chips with over 999,999,999 gates, the spec should use 9 zeros. Photonix currently has the largest/highest density FPGA with 100,632,541 gates.
  2. YYYY is the number of gates in an interconnection block; an interconnection block is a set of gates that can only talk to those in the block. Each block has a single set of communication wires to adjacent blocks. The minimum is 1, which means that every gate can talk to every adjacent gate. Current options range from 0001 to 0100.
  3. ZZZZ is the number of external I/O pins. Unless noted in the extended chip description, every I/O pin is capable of either input or output. The current/voltage limits of the pins are set by an engineering standard known as IO-106. Every FPGA manufacturer adheres to this standard as a minimum; there are some FPGAs with significantly more powerful I/O circuits for various applications.

The extended description of a type will list additional information such as the programming method (e.g. Photonix A-6, StarTech, etc.), operational limits, etc. With nearly 500 different models of FPGA on the market, there are chips with a collection of characteristics suitable for virtually every application.

Currently, FPGA-based systems permeate the automation market. Estimates are that 95% of the existing automation is controlled by a FPGA. Manufacturers like the logistical ease of only needing a few types of chip; engineers like the ease of having the same electrical/optical characteristics between products; consumers like the ease of upgrading a system - normally just a program upload to the FPGA. There is no known technology that threatens this dominant position, and even the Seven Worlds was unable to improve on the basic idea.

Logic Compilers

Logic compilers are rather complicated pieces of software that take a description of a problem or algorithm, and using its knowledge of the target FPGA hardware, recasts the algorithm into a set of inter-connected logic gates. This result is used to program a FPGA, allowing it to solve the problem or execute the algorithm. Without logic compilers, FPGAs are useless, as they can do nothing without programming.

Logic compilers are the modern version of the original computer language compilers developed in the 20th century. Like those ancient programs, logic compilers take a human-readable version of an algorithm and translate it into a machine-executable form. In the case of logic compilers, this form is the programming information to setup a FPGA. Due to the complexity of translating a general algorithm into gates, the results of the compilation is stored, rather than rerun the compiler. As with programming information, most manufacturers have a unique storage method, most of which are considered a trade secret. Photonix, in keeping with its philosophy, publishes its format, which makes it the de facto standard for logic compilers. In fact, most compilers store their results internally in Photonix's format, and then translate to the target FPGA format when programming.

Of the 24 major logic compilers available in the Starguild, all support the Photonix formats and programming methods. Those produced by hardware manufacturers also support their own formats and methods, but not those of their competitors. There are 2 compilers which support all known FPGA types, but these are the most expensive on the market (partly due to the licensing fees paid to 17 different chip companies). Consequently, these 2 generic compilers are relatively rare outside software companies.

Due to the nature of the output of a logic compiler, it is not possible to reconstruct the original source code from a programmed FGPA. It is possible to reverse-engineer the algorithm, although some manufacturers have attempted to make this impossible by write-only FPGA implementations. Dedicated hackers have yet to be defeated by such measures, and there exists a large class of software designed to take a programmed FPGA and deduce the algorithm via black-box methods; that is, feed the FPGA known input and watch the output. These tools are readily accessible, and quite good. The result is that few FPGA implementations expect any algorithm security once the programmed FPGA is on the market. Instead, the source code is guarded to prevent others from learning the programming methods and possibly undocumented abilities of the target chips. In the case of Photonix, much of the source code for their chips is published, as the programming method and specs of the chips are already well documented throughout the Starguild.

It is worth noting that the Seven Worlds, for all their technological advances in automation and other areas, did little to improve on the best the Starguild has to offer. The Seven Worlds had little incentive to improve Starguild logic compilers, as their resources were being spent in other areas.

Example Systems

The following examples detail various aspects of modern FPGA systems, from the extreme density of a BiComp, to the robustness of flight automation. As noted previously, FPGA systems are the standard, so these three examples should not be considered comprehensive of the use of FPGAs.

Seven Worlds BiComp

The 7W Power Armor main processor is quite possibly the best example of why FPGA systems are the dominant automation. The Seven Worlds, lacking the industrial base of the Starguild, used FPGA systems from the beginning. With the excellent hardware and compilers of the Starguild available via espionage, the Seven Worlds did little to produce their own unique designs. This changed with the first meeting of Dragoncrest Power Armor. When the Seven Worlds went to develop their own Power Armor, they began looking at the complexity of the control systems, and realized that no existing Starguild FPGA would quite suit the application. As a result, the Seven Worlds produced their one and only FPGA type. Rated as a 105671331-0010-03210 chip, the Seven Worlds chip was the most advanced of the time (Photonix produced a superior chip in 2328). The chip, dubbed the BiComp, became one of the major reasons for the effectiveness of Seven Worlds PA in combat.

The BiComp is a full FPGA, with a rather unique programming architecture: the chip can be broken into multiple sub-units to perform individual tasks. While most any FPGA can do this, the large number of I/O pins makes this option very attractive. Also, the chip has dedicated programming hardware on-chip, making it possible to have the chip reprogram parts of itself as it runs. This is unique in the history of FPGA design.

BiComp programs break the chip into many sub-processors, dedicated to various suit functions such as communications, movement, or life support. Moreover, the chip can detect damage, and reprogram less vital sub-processors with more vital functions. Hence, a partially damaged BiComp can still continue to perform life support, comm, and movement functions while losing less vital functions such as color-blending of the armor.

As every suit of PA uses identical chip hardware, even between revisions (the pin layout remained unchanged throughout the life of the 7 Worlds), the logistics of repairing a PA suit is greatly simplified. This became an important factor once the Imperial and Dragoncrest forces entered the Seven Worlds itself; any chip factory could produce BiComps for Power Armor, allowing the Seven Worlds to field more PA troops. Even the current advances of RMBK in developing the v9 BiComp, with a nearly sentient expert system interface, does not alter the pinout of the chip. Hence, a BiComp9 can be plugged directly into any 7W PA ever made, and be expected to work.

It should be noted that Starguild PA does not use an FPGA system, but a large collection of dedicated chips to perform each function. During its development of Power Armor, the Starguild lacked the necessary size FPGA, and bulk production of dedicated chips was cheaper and faster than building a new FPGA and the compiler to use it. The dedicated chips also have well-published specs, allowing the Imperium to contract multiple suppliers. The Imperium has never yet seen a reason to replace the dedicated chips with a FPGA, even though suitable chips are now available (e.g. the Photonix 102531764-0099-03400-MS).

Flight Automation

FPGA systems, with their ability to have their hardware reconfigured on-the-fly, makes them perfect for implementing robust automation for critical systems. A common example is the current generation of flight automation for starships. These massive expert systems use collections of FPGAs to monitor and respond to all the sensors and inputs of the ship, from the atmosphere sensors in compartments to the movement inputs of the pilot. These systems are updated quite often, as various companies improve portions of the algorithms.

It should be noted that ship commanders are often leery of being the first ship with a new program, as the cost of a bug is quite high. Military vessels are even more paranoid, using only well-tested programs in their automation. However, given a ship's useful lifespan of several decades, every ship undergoes several software upgrades in its life. These upgrades would be impractical without the ease of reprogramming FPGAs; there can be thousands of processors on a ship, which would otherwise have to be replaced by hand.

This extensive use of FPGAs, coupled with a bit of redundant communication equipment, also allows a ship to transfer critical functions from damaged to working processors in another part of the ship. This greatly improves the reliability and survivability of a ship, especially in combat.

Echelon

Echelon represents the darker side of FPGA technology. It is a system designed and built by the Imperial Secret Service to eavesdrop on the entire Starguild. It consists of an extensive network of field installations, each of which is equipped with a complex expert system designed to do one thing: infiltrate communication nodes, and reprogram the controlling FPGA to duplicate traffic to the local Echelon node. These field installations, linked by a private FTL backbone, concentrate their information to the main headquarters on Terra. There, FPGAs programmed with an evolved algorithm, sift the massive data stream looking for evidence of activity that warrants the ISS's attention.

Even with the hardware available to the Echelon project, it cannot sift all the information on the backbone at once. Instead, it randomly chooses some part and works on that for while, and then chooses another. When not being monitored, the field installations remove their additional programming, making it harder for Corporate watchdogs to detect the presence of Echelon in the communication backbone.

Without the widespread use of FPGAs, Echelon would not be possible, as the field installations would not be able to reprogram the communication nodes and perform some initial filtering at the node itself (such as discarding time signals, etc.). Still, the advantages of FPGA systems outweighs the disadvantages.

Anyone broadcasting on the Starguild backbone is warned to use strong encryption and covert channels, as Echelon is believed to be pervasive in the Starguild; even corporate networks are almost certainly compromised (ISS has talented hackers to break the firewalls). Seven Worlds communication nodes are immune to infiltration by Echelon, as they use a different programming method, and hence the field installations cannot coopt them.


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